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BEGIN:VEVENT
DTSTAMP:20181221T160904Z
LOCATION:C2/3/4 Ballroom
DTSTART;TZID=America/Chicago:20181115T083000
DTEND;TZID=America/Chicago:20181115T170000
UID:submissions.supercomputing.org_SC18_sess324_post249@linklings.com
SUMMARY:A Compiler Framework for Fixed-Topology Non-Deterministic Finite A
 utomata on SIMD Platforms
DESCRIPTION:Poster\nTech Program Reg Pass, Exhibits Reg Pass\n\nA Compiler
  Framework for Fixed-Topology Non-Deterministic Finite Automata on SIMD Pl
 atforms\n\nNourian, Wu, Becchi\n\nAutomata traversal acceleration has been
  studied on various parallel platforms. Many existing acceleration methods
  store finite automata states and transitions in memory. For these designs
  memory size and bandwidth are the main limiting factors to performance an
 d power efficiency. Many applications, however, require processing several
  fixed-topology automata that differ only in the symbols associated to the
  transitions. This property enables the design of alternative, memory-effi
 cient solutions.  We target fixed-topology non-deterministic finite automa
 ta (NFAs) and propose a memory-efficient design, suitable to SIMD architec
 tures, that embeds the automata topology in code and stores only the trans
 ition symbols in memory. We design a compiler that automates deployment of
  this design on SIMD platforms for a set of fixed-topology NFAs. Our compi
 ler framework performs a combination of platform-agnostic and platform-spe
 cific design decisions and optimizations. This poster describes the compil
 er toolchain and shows the achieved throughput on GPU and Intel SIMD devic
 es.
URL:https://sc18.supercomputing.org/presentation/?id=post249&sess=sess324
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