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DTSTAMP:20181221T160904Z
LOCATION:C2/3/4 Ballroom
DTSTART;TZID=America/Chicago:20181115T083000
DTEND;TZID=America/Chicago:20181115T170000
UID:submissions.supercomputing.org_SC18_sess324_post247@linklings.com
SUMMARY:Compiling SIMT Programs on Multi- and Many-Core Processors with Wi
 de Vector Units: A Case Study with CUDA
DESCRIPTION:Poster\nTech Program Reg Pass, Exhibits Reg Pass\n\nCompiling 
 SIMT Programs on Multi- and Many-Core Processors with Wide Vector Units: A
  Case Study with CUDA\n\nWu, Ravi, Becchi\n\nThere has been an increasing 
 interest in SIMT programming tools for multi- and manycore (co)processors 
 with wide vector extensions. In this work, we study the effective implemen
 tation of a SIMT programming model (a subset of CUDA C) on Intel platforms
  with 512-bit vector extensions (hybrid MIMD/SIMD architectures). We first
  propose a set of compiler techniques to transform programs written using 
 a SIMT programming model into code that leverages both the x86 cores and t
 he vector units of a hybrid MIMD/SIMD architecture, thus providing program
 mability, high system utilization and portability. We then evaluate the pr
 oposed techniques on various hybrid systems using microbenchmarks and real
 -world applications. Finally, we point out the main challenges in supporti
 ng the SIMT model on hybrid systems.
URL:https://sc18.supercomputing.org/presentation/?id=post247&sess=sess324
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