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TZID:America/Chicago
X-LIC-LOCATION:America/Chicago
BEGIN:DAYLIGHT
TZOFFSETFROM:-0600
TZOFFSETTO:-0500
TZNAME:CDT
DTSTART:19700308T020000
RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=2SU
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DTSTART:19701101T020000
RRULE:FREQ=YEARLY;BYMONTH=11;BYDAY=1SU
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BEGIN:VEVENT
DTSTAMP:20181221T160906Z
LOCATION:C154
DTSTART;TZID=America/Chicago:20181111T083000
DTEND;TZID=America/Chicago:20181111T170000
UID:submissions.supercomputing.org_SC18_sess254_tut150@linklings.com
SUMMARY:How to Analyze the Performance of Parallel Codes 101
DESCRIPTION:Tutorial\nPerformance, Tools, Tutorial Reg Pass\n\nHow to Anal
 yze the Performance of Parallel Codes 101\n\nSchulz, Galarowicz, Maghrak, 
 Green, Montoya\n\nPerformance analysis is an essential step in the develop
 ment of HPC codes. It will even gain in importance with the rising complex
 ity of machines and applications that we are seeing today. Many tools exis
 t to help with this analysis, but the user is too often left alone with in
 terpreting the results.\n\nWe will provide a practical road map for the pe
 rformance analysis of HPC codes and will provide users step-by-step advice
  on how to detect and optimize common performance problems, covering both 
 on-node performance and communication optimization as well as issues on th
 readed and accelerator-based architectures. In addition, we will review cu
 rrent approached in ubiquitous monitoring of performance utilizing lightwe
 ight tools. Throughout this tutorial, we will show live demos using Open|S
 peedShop, a comprehensive and easy to use tool set.  Additionally, at the 
 end of each section we will provide hands-on exercises for attendees to tr
 y out the new techniques learned with performance comparison across multip
 le architectures.  All techniques will, however, apply broadly to any tool
 , and we will point out alternative tools where useful.
URL:https://sc18.supercomputing.org/presentation/?id=tut150&sess=sess254
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