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DTSTAMP:20181221T160731Z
LOCATION:C140/142
DTSTART;TZID=America/Chicago:20181114T163000
DTEND;TZID=America/Chicago:20181114T170000
UID:submissions.supercomputing.org_SC18_sess210_pap346@linklings.com
SUMMARY:Performance Evaluation of a Vector Supercomputer SX-Aurora TSUBASA
DESCRIPTION:Paper\nArchitectures, Networks, Performance, Scientific Comput
 ing, State of the Practice, Tools, Tech Program Reg Pass\n\nPerformance Ev
 aluation of a Vector Supercomputer SX-Aurora TSUBASA\n\nKomatsu, Momose, I
 sobe, Watanabe, Musa...\n\nA new SX-Aurora TSUBASA vector supercomputer ha
 s been released with a new system architecture and a new execution model t
 o achieve high sustained performance, especially for memory-intensive appl
 ications. In SX-Aurora TSUBASA, the vector host (VH) of a standard x86 Lin
 ux node is attached to the vector engine (VE) of a newly developed vector 
 processor.  An application is executed on the VE, and only system calls ar
 e offloaded to the VH. This new execution model can avoid redundant data t
 ransfers between a VH and a VE that can easily become a bottleneck in the 
 conventional execution model. This paper examines the potential of SX-Auro
 ra TSUBASA. First, the basic performance of SX-Aurora TSUBASA is clarified
  by evaluating benchmark programs. Then, the effectiveness of the new exec
 ution model is examined by using a microbenchmark.  Finally, the high pote
 ntial of SX-Aurora TSUBASA is clarified through evaluations of practical a
 pplications.
URL:https://sc18.supercomputing.org/presentation/?id=pap346&sess=sess210
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