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DTSTAMP:20181221T160730Z
LOCATION:C146
DTSTART;TZID=America/Chicago:20181114T110000
DTEND;TZID=America/Chicago:20181114T113000
UID:submissions.supercomputing.org_SC18_sess183_pap338@linklings.com
SUMMARY:Runtime-Assisted Cache Coherence Deactivation in Task Parallel Pro
 grams
DESCRIPTION:Paper\nAlgorithms, Architectures, Memory, Networks, Parallel P
 rogramming Languages, Libraries, and Models, Power, Programming Systems, S
 cheduling, Tech Program Reg Pass\n\nRuntime-Assisted Cache Coherence Deact
 ivation in Task Parallel Programs\n\nCaheny, Alvarez, Valero, Moretó, Casa
 s\n\nWith increasing core counts, the scalability of directory-based cache
  coherence has become a challenging problem. To reduce the area and power 
 needs of the directory, recent proposals reduce its size by classifying da
 ta as private or shared, and disable coherence for private data. However, 
 existing classification methods suffer from inaccuracies and require compl
 ex hardware support with limited scalability.\n\nThis paper proposes a har
 dware/software co-designed approach: the runtime system identifies data th
 at is guaranteed by the programming model semantics to not require coheren
 ce and notifies the microarchitecture. The microarchitecture deactivates c
 oherence for this private data and powers off unused directory capacity. O
 ur proposal reduces directory accesses to just 26% of the baseline system 
 and supports a 64× smaller directory with only 2.8% performance degradatio
 n. By dynamically calibrating the directory size, our proposal saves 86% o
 f dynamic energy consumption in the directory without harming performance.
URL:https://sc18.supercomputing.org/presentation/?id=pap338&sess=sess183
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