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DTSTAMP:20181221T160725Z
LOCATION:D167/174
DTSTART;TZID=America/Chicago:20181111T090000
DTEND;TZID=America/Chicago:20181111T090100
UID:submissions.supercomputing.org_SC18_sess170_wksp138@linklings.com
SUMMARY:Introduction - Fourth International Workshop on Heterogeneous High
 -Performance Reconfigurable Computing (H2RC'18)
DESCRIPTION:Workshop\nAccelerators, Heterogeneous Systems, NVRAM, Workshop
  Reg Pass\n\nIntroduction - Fourth International Workshop on Heterogeneous
  High-Performance Reconfigurable Computing (H2RC'18)\n\nBakos, Blott, Hoef
 ler, Cappello\n\nAs in the previous three years, this workshop will bring 
 together application experts, software developers, and hardware engineers,
  both from industry and academia, to share experiences and best practices 
 to leverage the practical application of reconfigurable logic to Scientifi
 c Computing, Machine/Deep Learning, and “Big Data” applications. In partic
 ular, the workshop will focus on sharing experiences and techniques for ac
 celerating applications and/or improving energy efficiency with FPGAs usin
 g OpenCL, OpenMP, OpenACC, SYCL, C, C++, and other high-level design flows
 , which enable and improve cross-platform functional and performance porta
 bility while also improving productivity. Particular emphasis is given to 
 cross-platform comparisons and combinations that foster a better understan
 ding within the industry and research community on what are the best mappi
 ngs of applications to a diverse range of hardware architectures that are 
 available today (e.g., FPGA, GPU, Many-cores and hybrid devices, ASICs), a
 nd on how to most effectively achieve cross-platform compatibility.
URL:https://sc18.supercomputing.org/presentation/?id=wksp138&sess=sess170
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