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DTSTART:19700308T020000
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DTSTAMP:20181221T160726Z
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DTSTART;TZID=America/Chicago:20181111T145200
DTEND;TZID=America/Chicago:20181111T145400
UID:submissions.supercomputing.org_SC18_sess160_ws_whpc115@linklings.com
SUMMARY:Plasma Meets Portability: A Journey to Performance Portability in 
 a Particle-in-Cell Code
DESCRIPTION:Workshop\nDiversity, Education, Hot Topics, Workshop Reg Pass\
 n\nPlasma Meets Portability: A Journey to Performance Portability in a Par
 ticle-in-Cell Code\n\nKitson, Harrell\n\nIn our journey to exascale, it is
  imperative that applications not only run efficiently, but do so on a wid
 e variety of platforms at a reasonable cost. Codes must thus deal with a e
 xplosion of diversity among emerging architectures while avoiding a corres
 ponding explosion in code size. This requires that HPC developers make the
 ir codes performance portable, that is, able to efficiently utilise the re
 sources of each targeted platform, while simultaneously building a codebas
 e in which they can work productively. For our work, we focus primarily on
  the Vector Particle in Cell (VPIC) application. VPIC is a plasma physics 
 code that is highly performant, but past efforts to make it more portable 
 have come at a heavy maintenance cost. In order to alleviate this cost, we
  leverage a portability framework called Kokkos to maximize both the code 
 shared between platforms and the performance of the application. Throughou
 t the port, we apply a logging tool to gather data on the development proc
 ess.\n\nWe also analyze a VPIC Kernel which was successfully ported to Kok
 kos. The ported version can now run on GPUs, where the original cannot, an
 d on CPUs, where their performance is on par with the original. This is ac
 complished with a single codepath. Comparing performance across all tested
  platforms shows that the port increased the application’s performance eff
 iciency. We couple this performance assessment with analysis of the port i
 tself, based on data from the logging tool. Preliminary analysis of the da
 ta shows three stages in the development workflow.
URL:https://sc18.supercomputing.org/presentation/?id=ws_whpc115&sess=sess1
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