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DTSTAMP:20181221T160731Z
LOCATION:D174
DTSTART;TZID=America/Chicago:20181116T115000
DTEND;TZID=America/Chicago:20181116T121000
UID:submissions.supercomputing.org_SC18_sess146_ws_ftxs120@linklings.com
SUMMARY:Influence of A-Posteriori Subcell Limiting on Fault Frequency in H
 igher-Order DG Schemes
DESCRIPTION:Workshop\nResiliency, Scientific Computing, Workshop Reg Pass\
 n\nInfluence of A-Posteriori Subcell Limiting on Fault Frequency in Higher
 -Order DG Schemes\n\nReinarz, Gallard, Bader\n\nSoft error rates are incre
 asing as modern architectures require increasingly small features at low v
 oltages. Due to the large number of components used in HPC architectures, 
 these are particularly vulnerable to soft errors. Hence, when designing ap
 plications that run for long time periods on large machines, algorithmic r
 esilience must be taken into account. In this paper we analyse the inheren
 t resiliency of a-posteriori limiting procedures in the context of the exp
 licit ADER DG hyperbolic PDE solver ExaHyPE. The a-posteriori limiter chec
 ks element-local high-order DG solutions for physical admissibility, and c
 an thus be expected to also detect hardware-induced errors.  Algorithmical
 ly, it can be interpreted as element-local checkpointing and restarting of
  the solver with a more robust finite volume scheme on a fine subgrid. We 
 show that the limiter indeed increases the resilience of the DG algorithm,
  detecting and correcting particularly those faults which would otherwise 
 lead to a fatal failure.
URL:https://sc18.supercomputing.org/presentation/?id=ws_ftxs120&sess=sess1
 46
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